ADG904 AN:AN-952: ADG9xx Wideband CMOS Switches: Frequently Asked Questions | Analog Devices
How can a dc bias be applied to RF inputs?
To minimize any current drain through the termination resistance on the input side, it is best to add the bias on the output (RFC) side. This is the best practice, especially for low power portable applications, but it may be necessary to apply dc-blocking capacitors on the RF outputs if downstream circuitry cannot handle this dc bias.
Can a higher dc bias than 0.5 V be used?
Figure 1 shows (AN-952 page.2) that the on resistance increases exponentially as the input signal increases. It also shows that a dc signal higher than 0.5 V (Figure 1) contributes to loss across the switch and the user will want to keep the on resistance to a minimum. As with standard CMOS switches the signal applied to the switch inputs should never exceed the VDD supply.
If you look at Figure 1 (AN-952 page.2), from the link above, you can see that the Ron changes as the voltage increases. So it’s best to apply a 0.5V Bias, This is all explained in the app notes.